Datasheet

28.9.5 ADC Control and Status Register B

Name: ADCSRB

Offset: 0x7B

Reset: 0x00

Property: -

Bit 7 6 5 4 3 2 1 0

ACME ADTS[2:0]

Access

R/W R/W R/W R/W

Reset 0 0 0 0

Bit 6 – ACME Analog Comparator Multiplexer Enable

When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), the ADC

multiplexer selects the negative input to the analog comparator. When this bit is written logic zero, AIN1 is

applied to the negative input of the analog comparator. For a detailed description of this bit, see Analog

Comparator Multiplexed Input.

Bits 2:0 – ADTS[2:0] ADC Auto Trigger Source

If ADATE in ADCSRA is written to one, the value of these bits selects which source will trigger an ADC

conversion. If ADATE is cleared, the ADTS[2:0] settings will have no effect. A conversion will be triggered

by the rising edge of the selected interrupt flag. Note that switching from a trigger source that is cleared to

a trigger source that is set, will generate a positive edge on the trigger signal. If ADEN in ADCSRA is set,

this will start a conversion. Switching to Free Running mode (ADTS[2:0]=0) will not cause a trigger event,

even if the ADC interrupt flag is set.

Table 28-6. ADC Auto Trigger Source Selection

ADTS[2:0] Trigger Source

000 Free Running mode

001 Analog Comparator

010 External Interrupt Request 0

011 Timer/Counter0 Compare Match A

100 Timer/Counter0 Overflow

101 Timer/Counter1 Compare Match B

110 Timer/Counter1 Overflow

111 Timer/Counter1 Capture Event