Datasheet

Figure 26-12. Formats and States in the Master Transmitter Mode
S SLA W A DATA A P
0x08 0x18 0x28
R SLA W
0x10
A P
0x20
P
0x30
A or A
0x38
A
Other master
continues
A or A
0x38
Other master
continues
R
A
0x68
Other master
continues
0x78 0xB0
To corresponding
states in slave mode
MT
MR
Successfull
transmission
to a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Not acknowledge
received after a data
byte
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
DATA A
n
From master to slave
From slave to master
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the Two-Wire Serial Bus. The
prescaler bits are zero or masked to zero.
S
26.7.2 Master Receiver Mode
In the Master Receiver (MR) mode, a number of data bytes are received from a slave transmitter (see
next figure). In order to enter a Master mode, a START condition must be transmitted. The format of the
following address packet determines whether Master Transmitter (MT) or MR mode is to be entered. If
SLA+W is transmitted the MT mode is entered, if SLA+R is transmitted the MR mode is entered. All the
status codes mentioned in this section assume that the prescaler bits are zero or are masked to zero.
ATmega48PA/88PA/168PA
Two-Wire Serial Interface (TWI)
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 287