Datasheet

20.15.4 TC1 Counter Value Low and High byte

Name: TCNT1L and TCNT1H

Offset: 0x84

Reset: 0x00

Property: -

The TCNT1L and TCNT1H register pair represents the 16-bit value, TCNT1. The low byte [7:0] (suffix L)

is accessible at the original offset. The high byte [15:8] (suffix H) can be accessed at offset + 0x01. For

more details on reading and writing 16-bit registers, refer to Accessing 16-bit Timer/Counter Registers.

Bit 15 14 13 12 11 10 9 8

TCNT1[15:8]

Access

R/W R/W R/W R/W R/W R/W R/W R/W

Reset 0 0 0 0 0 0 0 0

Bit 7 6 5 4 3 2 1 0

TCNT1[7:0]

Access

R/W R/W R/W R/W R/W R/W R/W R/W

Reset 0 0 0 0 0 0 0 0

Bits 15:0 – TCNT1[15:0] Timer/Counter 1 Counter Value

The two Timer/Counter I/O locations (TCNT1H and TCNT1L, combined TCNT1) give direct access, both

for read and for write operations, to the timer/counter unit 16-bit counter. To ensure that both the high and

low bytes are read and written simultaneously when the CPU accesses these registers, the access is

performed using an 8-bit temporary high byte register (TEMP). This temporary register is shared by all the

other 16-bit registers. Refer to Accessing 16-bit Timer/Counter Registers for details.

Modifying the counter (TCNT1) while the counter is running introduces a risk of missing a compare match

between TCNT1 and one of the OCR1x registers.

Writing to the TCNT1 register blocks (removes) the compare match on the following timer clock for all

compare units.