Datasheet

59
7674F–AVR–09/09
ATmega164P/324P/644P
• Bit 5, 2:0 - WDP3:0: Watchdog Timer Prescaler 3, 2, 1 and 0
The WDP3:0 bits determine the Watchdog Timer prescaling when the Watchdog Timer is run-
ning. The different prescaling values and their corresponding time-out periods are shown in
Table 9-2 on page 59.
.
Table 9-2. Watchdog Timer Prescale Select
WDP3 WDP2 WDP1 WDP0
Number of WDT Oscillator
Cycles
Typical Time-out at
V
CC
= 5.0V
0000 2K (2048) cycles 16 ms
0001 4K (4096) cycles 32 ms
0010 8K (8192) cycles 64 ms
0011 16K (16384) cycles 0.125 s
0100 32K (32768) cycles 0.25 s
0101 64K (65536) cycles 0.5 s
0110 128K (131072) cycles 1.0 s
0111 256K (262144) cycles 2.0 s
1000 512K (524288) cycles 4.0 s
10011024K (1048576) cycles 8.0 s
1010
Reserved
1011
1100
1101
1110
1111