Datasheet

239
7674F–AVR–09/09
ATmega164P/324P/644P
The TWAMR can be loaded with a 7-bit Slave Address mask. Each of the bits in TWAMR can
mask (disable) the corresponding address bit in the TWI Address Register (TWAR). If the mask
bit is set to one then the address match logic ignores the compare between the incoming
address bit and the corresponding bit in TWAR. Figure 19-22 shows the address match logic in
detail.
Figure 19-22. TWI Address Match Logic, Block Diagram
• Bit 0 – Res: Reserved Bit
This bit is reserved and will always read as zero.
Address
Match
Address Bit Comparator 0
Address Bit Comparator 6..1
TWAR0
TWAMR0
Address
Bit 0