Datasheet

69
ATmega162/V
2513G–AVR–03/05
Special Function IO Register –
SFIOR
• Bit 2 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn
and PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01).
See “Configuring the Pin” on page 63 for more details about this feature.
Alternate Functions of Port A Port A has an alternate function as the address low byte and data lines for the External
Memory Interface and as Pin Change Interrupt.
Table 30 and Table 31 relate the alternate functions of Port A to the overriding signals
shown in Figure 32 on page 67.
Bit 7 6 5 4 3 2 1 0
TSM XMBK XMM2 XMM1 XMM0 PUD PSR2 PSR310 SFIOR
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Table 29. Port A Pins Alternate Functions
Port Pin Alternate Function
PA7
AD7 (External memory interface address and data bit 7)
PCINT7 (Pin Change INTerrupt 7)
PA6
AD6 (External memory interface address and data bit 6)
PCINT6 (Pin Change INTerrupt 6)
PA5
AD5 (External memory interface address and data bit 5)
PCINT5 (Pin Change INTerrupt 5)
PA4
AD4 (External memory interface address and data bit 4)
PCINT4 (Pin Change INTerrupt 4)
PA3
AD3 (External memory interface address and data bit 3)
PCINT3 (Pin Change INTerrupt 3)
PA2
AD2 (External memory interface address and data bit 2)
PCINT2 (Pin Change INTerrupt 2)
PA1
AD1 (External memory interface address and data bit 1)
PCINT1 (Pin Change INTerrupt 1)
PA0
AD0 (External memory interface address and data bit 0)
PCINT0 (Pin Change INTerrupt 0)