Datasheet

40
ATmega162/V
2513G–AVR–03/05
The CKDIV8 Fuse determines the initial value of the CLKPS bits. If CKDIV8 is unpro-
grammed, the CLKPS bits will be reset to “0000”. If CKDIV8 is programmed, CLKPS bits
are reset to “0011”, giving a division factor of 8 at start up. This feature should be used if
the selected clock source has a higher frequency than the maximum frequency of the
device at the present operating conditions. Note that any value can be written to the
CLKPS bits regardless of the CKDIV8 Fuse setting. The Application software must
ensure that a sufficient division factor is chosen if the selected clock source has a higher
frequency than the maximum frequency of the device at the present operating condi-
tions. The device is shipped with the CKDIV8 Fuse programmed.
Table 15. Clock Prescaler Select
CLKPS3 CLKPS2 CLKPS1 CLKPS0 Clock Division Factor
00001
00012
00104
00118
010016
010132
011064
0111128
1000256
1001Reserved
1010Reserved
1011Reserved
1100Reserved
1101Reserved
1110Reserved
1111Reserved