Datasheet

iii
ATmega162/V
2513G–AVR–03/05
Overview........................................................................................................... 137
Timer/Counter Clock Sources........................................................................... 138
Counter Unit...................................................................................................... 139
Output Compare Unit........................................................................................ 139
Compare Match Output Unit............................................................................. 141
Modes of Operation .......................................................................................... 142
Timer/Counter Timing Diagrams....................................................................... 146
8-bit Timer/Counter Register Description ......................................................... 148
Asynchronous operation of the Timer/Counter................................................. 152
Timer/Counter Prescaler................................................................................... 156
Serial Peripheral Interface – SPI..................................................... 157
SS Pin Functionality.......................................................................................... 161
Data Modes ...................................................................................................... 164
USART .............................................................................................. 165
Dual USART ..................................................................................................... 165
Clock Generation.............................................................................................. 167
Frame Formats ................................................................................................. 170
USART Initialization.......................................................................................... 171
Data Transmission – The USART Transmitter ................................................. 172
Data Reception – The USART Receiver .......................................................... 174
Asynchronous Data Reception ......................................................................... 178
Multi-processor Communication Mode ............................................................. 181
Accessing UBRRH/
UCSRC Registers............................................................................................. 183
USART Register Description ............................................................................ 185
Examples of Baud Rate Setting........................................................................ 190
Analog Comparator ......................................................................... 194
JTAG Interface and On-chip Debug System ................................. 196
Features............................................................................................................ 196
Overview........................................................................................................... 196
Test Access Port – TAP.................................................................................... 196
TAP Controller .................................................................................................. 199
Using the Boundary-scan Chain....................................................................... 199
Using the On-chip Debug system..................................................................... 200
On-chip debug specific JTAG instructions........................................................ 201
On-chip Debug Related Register in I/O Memory .............................................. 201
Using the JTAG Programming Capabilities ...................................................... 201
Bibliography...................................................................................................... 202
IEEE 1149.1 (JTAG) Boundary-scan .............................................. 203
Features............................................................................................................ 203
System Overview.............................................................................................. 203