Datasheet

105

ATmega162/V

2513G–AVR–03/05

16-bit Timer/Counter

(Timer/Counter1 and

Timer/Counter3)

The 16-bit Timer/Counter unit allows accurate program execution timing (event man-

agement), wave generation, and signal timing measurement. The main features are:

•

True 16-bit Design (i.e., allows 16-bit PWM)

• Two Independent Output Compare Units

• Double Buffered Output Compare Registers

• One Input Capture Unit

• Input Capture Noise Canceler

• Clear Timer on Compare Match (Auto Reload)

• Glitch-free, Phase Correct Pulse Width Modulator (PWM)

• Variable PWM Period

• Frequency Generator

• External Event Counter

• Eight Independent Interrupt Sources (TOV1, OCF1A, OCF1B, ICF1, TOV3, OCF3A, OCF3B,

and ICF3)

Restriction in

ATmega161

Compatibility Mode

Note that in ATmega161 compatibility mode, only one 16-bits Timer/Counter is available

(Timer/Counter1).

Overview Most register and bit references in this section are written in general form. A lower case

“n” replaces the Timer/Counter number, and a lower case “x” replaces the Output Com-

pare unit channel. However, when using the register or bit defines in a program, the

precise form must be used i.e., TCNT1 for accessing Timer/Counter1 counter value and

so on.

A simplified block diagram of the 16-bit Timer/Counter is shown in Figure 46. For the

actual placement of I/O pins, refer to “Pinout ATmega162” on page 2. CPU accessible

I/O Registers, including I/O bits and I/O pins, are shown in bold. The device-specific I/O

on page 127.