Datasheet

39
2466T–AVR–07/10
ATmega16(L)
Power-on Reset A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level
is defined in Table 15. The POR is activated whenever V
CC
is below the detection level. The
POR circuit can be used to trigger the Start-up Reset, as well as to detect a failure in supply
voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the
Power-on Reset threshold voltage invokes the delay counter, which determines how long the
device is kept in RESET after V
CC
rise. The RESET signal is activated again, without any delay,
when V
CC
decreases below the detection level.
Figure 16. MCU Start-up, RESET
Tied to V
CC
.
Figure 17. MCU Start-up, RESET
Extended Externally
V
RESET
TIME-OUT
I
NTERNAL
RESET
t
TOUT
V
POT
V
RST
CC
RESET
TIME-OUT
I
NTERNAL
RESET
t
TOUT
V
POT
V
RST
V
CC