Datasheet

274
2466T–AVR–07/10
ATmega16(L)
Figure 136. SPI Serial Programming and Verify
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Notes: 1. If the device is clocked by the Internal Oscillator, it is no need to connect a clock source to the
XTAL1 pin.
2. V
CC
-0.3V < AVCC < V
CC
+0.3V, however, AVCC should always be within 2.7V - 5.5V
When programming the EEPROM, an auto-erase cycle is built into the self-timed programming
operation (in the serial mode ONLY) and there is no need to first execute the Chip Erase instruc-
tion. The Chip Erase operation turns the content of every memory location in both the Program
and EEPROM arrays into $FF.
Depending on CKSEL Fuses, a valid clock must be present. The minimum low and high periods
for the serial clock (SCK) input are defined as follows:
Low: > 2 CPU clock cycles for f
ck
< 12 MHz, 3 CPU clock cycles for f
ck
12 MHz
High: > 2 CPU clock cycles for f
ck
< 12 MHz, 3 CPU clock cycles for f
ck
12 MHz
SPI Serial
Programming
Algorithm
When writing serial data to the ATmega16, data is clocked on the rising edge of SCK.
When reading data from the ATmega16, data is clocked on the falling edge of SCK. See Figure
138 for timing details.
To program and verify the ATmega16 in the SPI Serial Programming mode, the following
sequence is recommended (See four byte instruction formats in Figure 116 on page 276):
1. Power-up sequence:
Apply power between V
CC
and GND while RESET and SCK are set to “0”. In some sys-
tems, the programmer can not guarantee that SCK is held low during power-up. In this
case, RESET
must be given a positive pulse of at least two CPU clock cycles duration
after SCK has been set to “0”.
2. Wait for at least 20 ms and enable SPI Serial Programming by sending the Programming
Enable serial instruction to pin MOSI.
3. The SPI Serial Programming instructions will not work if the communication is out of syn-
chronization. When in sync. the second byte ($53), will echo back when issuing the third
byte of the Programming Enable instruction. Whether the echo is correct or not, all four
bytes of the instruction must be transmitted. If the $53 did not echo back, give RESET
a
positive pulse and issue a new Programming Enable command.
VCC
GND
XTAL1
SCK
MISO
MOSI
RESET
PB5
PB6
PB7
+2.7 - 5.5V
AVCC
+2.7 - 5.5V
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