Datasheet

162
2466T–AVR–07/10
ATmega16(L)
Accessing
UBRRH/ UCSRC
Registers
The UBRRH Register shares the same I/O location as the UCSRC Register. Therefore some
special consideration must be taken when accessing this I/O location.
Write Access When doing a write access of this I/O location, the high bit of the value written, the USART Reg-
ister Select (URSEL) bit, controls which one of the two registers that will be written. If URSEL is
zero during a write operation, the UBRRH value will be updated. If URSEL is one, the UCSRC
setting will be updated.
The following code examples show how to access the two registers.
Note: 1. See “About Code Examples” on page 7.
As the code examples illustrate, write accesses of the two registers are relatively unaffected of
the sharing of I/O location.
Read Access Doing a read access to the UBRRH or the UCSRC Register is a more complex operation. How-
ever, in most applications, it is rarely necessary to read any of these registers.
The read access is controlled by a timed sequence. Reading the I/O location once returns the
UBRRH Register contents. If the register location was read in previous system clock cycle, read-
ing the register in the current clock cycle will return the UCSRC contents. Note that the timed
sequence for reading the UCSRC is an atomic operation. Interrupts must therefore be controlled
(for example by disabling interrupts globally) during the read operation.
Assembly Code Example
(1)
...
; Set UBRRH to 2
ldi r16,0x02
out UBRRH,r16
...
; Set the USBS and the UCSZ1 bit to one, and
; the remaining bits to zero.
ldi r16,(1<<URSEL)|(1<<USBS)|(1<<UCSZ1)
out UCSRC,r16
...
C Code Example
(1)
...
/* Set UBRRH to 2 */
UBRRH = 0x02;
...
/* Set the USBS and the UCSZ1 bit to one, and */
/* the remaining bits to zero. */
UCSRC = (1<<URSEL)|(1<<USBS)|(1<<UCSZ1);
...