Datasheet

118
2466T–AVR–07/10
ATmega16(L)
The double buffered Output Compare Register (OCR2) is compared with the Timer/Counter
value at all times. The result of the compare can be used by the waveform generator to generate
a PWM or variable frequency output on the Output Compare Pin (OC2). See “Output Compare
Unit” on page 119. for details. The compare match event will also set the Compare Flag (OCF2)
which can be used to generate an output compare interrupt request.
Definitions Many register and bit references in this document are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 2. However, when using the register or bit
defines in a program, the precise form must be used (that is, TCNT2 for accessing
Timer/Counter2 counter value and so on). The definitions in Table 49 are also used extensively
throughout the document.
Timer/Counter
Clock Sources
The Timer/Counter can be clocked by an internal synchronous or an external asynchronous
clock source. The clock source clk
T2
is by default equal to the MCU clock, clk
I/O
. When the AS2
bit in the ASSR Register is written to logic one, the clock source is taken from the Timer/Counter
Oscillator connected to TOSC1 and TOSC2. For details on asynchronous operation, see “Asyn-
chronous Status Register – ASSR” on page 131. For details on clock sources and prescaler, see
“Timer/Counter Prescaler” on page 134.
Counter Unit The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit. Figure
54 shows a block diagram of the counter and its surrounding environment.
Figure 54. Counter Unit Block Diagram
Signal description (internal signals):
count Increment or decrement TCNT2 by 1.
direction Selects between increment and decrement.
clear Clear TCNT2 (set all bits to zero).
clk
T2
Timer/Counter clock.
top Signalizes that TCNT2 has reached maximum value.
Table 49. Definitions
BOTTOM The counter reaches the BOTTOM when it becomes zero (0x00).
MAX The counter reaches its MAXimum when it becomes 0xFF (decimal
255).
TOP The counter reaches the TOP when it becomes equal to the highest
value in the count sequence. The TOP value can be assigned to be the
fixed value 0xFF (MAX) or the value stored in the OCR2 Register. The
assignment is dependent on the mode of operation.
DATA B US
TCNTn Control Logic
count
TOVn
(Int.Req.)
topbottom
direction
clear
TOSC1
T/C
Oscillator
TOSC2
Prescaler
clk
I/O
clk
Tn