Datasheet

112
2466T–AVR–07/10
ATmega16(L)
A FOC1A/FOC1B strobe will not generate any interrupt nor will it clear the timer in Clear Timer
on Compare match (CTC) mode using OCR1A as TOP.
The FOC1A/FOC1B bits are always read as zero.
• Bit 1:0 – WGM11:0: Waveform Generation Mode
Combined with the WGM13:2 bits found in the TCCR1B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see Table 47. Modes of operation supported by the Timer/Counter
unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode, and three types
of Pulse Width Modulation (PWM) modes. (See “Modes of Operation” on page 101.)
Note: 1. The CTC1 and PWM11:0 bit definition names are obsolete. Use the WGM12:0 definitions. However, the functionality and
location of these bits are compatible with previous versions of the timer.
Table 47. Waveform Generation Mode Bit Description
(1)
Mode WGM13
WGM12
(CTC1)
WGM11
(PWM11)
WGM10
(PWM10)
Timer/Counter Mode of Operation TOP
Update of
OCR1x
TOV1 Flag Set
on
00 0 0 0
Normal 0xFFFF Immediate MAX
10 0 0 1
PWM, Phase Correct, 8-bit 0x00FF TOP BOTTOM
20 0 1 0
PWM, Phase Correct, 9-bit 0x01FF TOP BOTTOM
30 0 1 1
PWM, Phase Correct, 10-bit 0x03FF TOP BOTTOM
40 1 0 0
CTC OCR1A Immediate MAX
50 1 0 1
Fast PWM, 8-bit 0x00FF BOTTOM TOP
60 1 1 0
Fast PWM, 9-bit 0x01FF BOTTOM TOP
70 1 1 1
Fast PWM, 10-bit 0x03FF BOTTOM TOP
81 0 0 0
PWM, Phase and Frequency Correct ICR1 BOTTOM BOTTOM
91 0 0 1
PWM, Phase and Frequency Correct OCR1A BOTTOM BOTTOM
10 1 0 1 0
PWM, Phase Correct ICR1 TOP BOTTOM
11 1 0 1 1
PWM, Phase Correct OCR1A TOP BOTTOM
12 1 1 0 0
CTC ICR1 Immediate MAX
13 1 1 0 1
Reserved – – –
14 1 1 1 0
Fast PWM ICR1 BOTTOM TOP
15 1 1 1 1
Fast PWM OCR1A BOTTOM TOP