Datasheet

20
2467XS–AVR–06/11
ATmega128
Rev. 2467J-12/03 1. Updated “Calibrated Internal RC Oscillator” on page 41.
Rev. 2467I-09/03 1. Updated note in “XTAL Divide Control Register – XDIV” on page 36.
2. Updated “JTAG Interface and On-chip Debug System” on page 48.
3. Updated values for V
BOT
(BODLEVEL = 1) in Table 19 on page 50.
4. Updated “Test Access Port – TAP” on page 246 regarding JTAGEN.
5. Updated description for the JTD bit on page 255.
6. Added a note regarding JTAGEN fuse to Table 118 on page 288.
7. Updated R
PU
values in “DC Characteristics” on page 318.
8. Added a proposal for solving problems regarding the JTAG instruction IDCODE in
“Errata” on page 15.
Rev. 2467H-02/03 1. Corrected the names of the two Prescaler bits in the SFIOR Register.
2. Added Chip Erase as a first step under “Programming the Flash” on page 315 and
“Programming the EEPROM” on page 316.
3. Removed reference to the “Multipurpose Oscillator” application note and the “32kHz
Crystal Oscillator” application note, which do not exist.
4. Corrected OCn waveforms in Figure 52 on page 125.
5. Various minor Timer1 corrections.
6. Added information about PWM symmetry for Timer0 and Timer2.
7. Various minor TWI corrections.
8. Added reference to Table 124 on page 291 from both SPI Serial Programming and Self
Programming to inform about the Flash Page size.
9. Added note under “Filling the Temporary Buffer (Page Loading)” on page 280 about
writing to the EEPROM during an SPM Page load.
10. Removed ADHSM completely.
11. Added section “EEPROM Write During Power-down Sleep Mode” on page 24.
12. Updated drawings in “Packaging Information” on page 13.
Rev. 2467G-09/02 1. Changed the Endurance on the Flash to 10,000 Write/Erase Cycles.
Rev. 2467F-09/02 1. Added 64-pad QFN/MLF Package and updated “Ordering Information” on page 12.