Datasheet

90E36A POLY-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
Register 54 April 2, 2013
CS0
Checksum 0
There are multiple Start register and Checksum (CS0/CS1/CS2/CS3) registers for different crucial register blocks. Those registers are handled in
the similar way.
6.4.3 ENERGY CALIBRATION REGISTERS
Address: 3BH
Type: Read/Write
Default Value: 421CH
Bit Name Description
15 - 0 CS0[15:0]
This register should be written after the 31H-3AH registers are written. Suppose the high byte and the low byte of the 31H-3AH
registers are shown in the below table.
The calculation of the CS0 register is as follows:
The low byte of 3BH register is: L
3B
=MOD(H
31
+H
32
+...+H
3A
+L
31
+L
32
+...+L
3A
, 2^8)
The high byte of 3BH register is: H
3B
=H
31
XOR H
32
XOR... XOR H
3A
XOR L
31
XOR L
32
XOR... XOR L
3A
The 90E36A calculates CS0 regularly. If the value of the CS0 register and the calculation by the 90E36A is different when Con-
figStart=8765H, the CS0Err bit (b14, SysStatus0) is set and the WarnOut and IRQ pins are asserted.
Note: The readout value of the CS0 register is the calculation by the 90E36A, which is different from what is written.
Table-6 Calibration Registers
Register
Address Register Name
Read/Write
Type Functional Description Power-on Value
Calibration Registers
40H CalStart R/W Calibration Start Command 6886H
41H POffsetA R/W Phase A Active Power Offset 0000H
42H QOffsetA R/W Phase A Reactive Power Offset 0000H
43H POffsetB R/W Phase B Active Power Offset 0000H
44H QOffsetB R/W Phase B Reactive Power Offset 0000H
45H POffsetC R/W Phase C Active Power Offset 0000H
46H QOffsetC R/W Phase C Reactive Power Offset 0000H
47H GainA R/W
Phase A Active/Reactive Energy calibration
gain
0000H
48H PhiA R/W Phase A calibration phase angle 0000H
49H GainB R/W
Phase B Active/Reactive Energy calibration
gain
0000H
Register Address High Byte Low Byte
31H
H
31
L
31
32H
H
32
L
32
33H
H
33
L
33
34H
H
34
L
34
35H
H
35
L
35
36H
H
36
L
36
37H
H
37
L
37
38H
H
38
L
38
39H
H
39
L
39
3AH
H
3A
L
3A