Datasheet

90E36A POLY-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
Register 45 April 2, 2013
6.3 LOW-POWER MODES REGISTERS
6.3.1 DETECTION MODE REGISTERS
Current Detection register latching scheme is:
When any of the 4 current detection registers (0x10 - 0x13) were programmed, all the 4 current detection registers (including the registers that not
being programmed) will be automatically latched into the current detector's internal configuration latches at the same time. Those latched configura-
tion values are not subject to digital reset signals and will be kept in all the 4 power modes. The power up value of those latches is not deterministic,
so user needs to program the current detection registers to update.
Figure-15 Current Detection Register Latching Scheme
DetectCtrl
Current Detect Control
Address: 10H
Type: Read/Write
Default Value: 0000H
Bit Name Description
15:6 - Reserved.
5:0 DetectCtrl
Detector power-down, active high:
[5:3]: Power-down for negative detector of channel 3/2/1;
[2:0]: Power-down for positive detector of channel 3/2/1.
0x10
0x11
0x12
0x13
latch
latch
latch
latch
Current detector
register Write
update
registers
Current Detector block