Datasheet

90E32AS ENHANCED POLY-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
Register 54 April 2, 2013
GainBIrms2
Phase B Gain Compensation for Current Segment 2
PhiCIrms01
Phase C Phase Compensation for Current Segment 0 and 1
PhiCIrms2
Phase C Phase Compensation for Current Segment 2
GainCIrms01
Phase C Gain Compensation for Current Segment 0 and 1
GainCIrms2
Phase C Gain Compensation for Current Segment 2
Address: 2BH
Type: Read/Write
Default Value: 0000H
Bit Name Description
15:8 - Reserved.
7:0 GainIrms2 Gain compensation for current segment 2 (Irms < Irms1). Refer to 3.9.1 Gain Based Compensation.
Address: 2CH
Type: Read/Write
Default Value: 0000H
Bit Name Description
15:8 PhiIrms1 Phase compensation for current segment 1 (Irms1<Irms < Irms0). Refer to 3.9.2 Delay/Phase Based Compensation.
7:0 PhiIrms0 Phase compensation for current segment 0 (Irms > Irms0). Refer to 3.9.2 Delay/Phase Based Compensation.
Address: 2DH
Type: Read/Write
Default Value: 0000H
Bit Name Description
15:8 - Reserved.
7:0 PhiIrms2 Phase compensation for current segment 2 (Irms < Irms1). Refer to 3.9.2 Delay/Phase Based Compensation.
Address: 2EH
Type: Read/Write
Default Value: 0000H
Bit Name Description
15:8 GainIrms1 Gain compensation for current segment 1 (Irms1<Irms < Irms0). Refer to 3.9.1 Gain Based Compensation.
7:0 GainIrms0 Gain compensation for current segment 0 (Irms > Irms0). Refer to 3.9.1 Gain Based Compensation.
Address: 2FH
Type: Read/Write
Default Value: 0000H
Bit Name Description
15:8 - Reserved.
7:0 GainIrms2 Gain compensation for current segment 2 (Irms < Irms1). Refer to 3.9.1 Gain Based Compensation.