Datasheet

90E32AS ENHANCED POLY-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
Register 45 April 2, 2013
SagPeakDetCfg
Sag and Peak Detector Period Configuration
OVth
Over Voltage Threshold
5.2.3 SPECIAL CONFIGURATION REGISTERS
ZXConfig
Zero-Crossing Configuration
Address: 05H
Type: Read/Write
Default Value: 143FH
Bit Name Description
15:8 PeakDet_period Period in which the peak detector detects the U/I peak. Unit is ms.
7:0 Sag_Period
Period in which the phase voltage needs to stay below the SagTh before to assert the Sag status. Unit is ms.
The Phase Loss detector also uses this parameter in detecting Phase Loss.
Address: 06H
Type: Read/Write
Default Value: C000H
Bit Name Description
15:0 OVth
Over Voltage threshold.
0xFFFF maps to ADC output full-scale peak.
Address: 07H
Type: Read/Write
Default Value: 0001H
Bit Name Description
15:13 ZX2Src[2:0] These bits select the signal source for the ZX2, ZX1 or ZX0 pins.
12:10 ZX1Src[2:0]
9:7 ZX0Src[2:0]
6:5 ZX2Con[1:0] These bits configure zero-crossing type for the ZX2, ZX1 and ZX0 pins.
4:3 ZX1Con[1:0]
2:1 ZX0Con[1:0]
0ZXdis
This bit determines whether to disable the ZX signals:
0: enable
1: disable all the ZX signals to ‘0’ (default).
Code Source
011 Fixed-0
000 Ua
001 Ub
010 Uc
111 Fixed-0
100 Ia
101 Ib
110 Ic
Code Zero-Crossing Configuration
00
Positive Zero-crossing
01
Negative Zero-crossing
10
All Zero-crossing
11
No Zero-crossing Output