Datasheet

761
AT32UC3A
Note: This register is primarily intended for compatibility with other AVR32 devices. Certain oper-
ations may not function correctly when parts of the system are reset. It is generally
recommended to only write 0x11111 or 0x00000 to these bits to ensure no unintended side
effects occur.
36.10.3 Boundary-Scan Chain
The Boundary-Scan Chain has the capability of driving and observing the logic levels on the dig-
ital I/O pins, as well as driving and observing the logic levels between the digital I/O pins and the
internal logic. Typically, output value, output enable, and input data are all available in the
boundary scan chain.
The boundary scan chain is described in the BDSL (Boundary Scan Description Language) file
available at the Atmel web site.
36.11 SAB address map
The Service Access Bus (SAB) gives the user access to the internal address space and other
features through a 36 bits address space. The 4 MSBs identify the slave number, while the 32
LSBs are decoded within the slave’s address space. The SAB slaves are shown in Table 36-17.
CPU
CPU
APP
HSB and PB buses
OCD
On-Chip Debug logic and registers
RSERVED
No effect
Table 36-17. SAB Slaves, addresses and descriptions.
Slave Address [35:32] Description
Unallocated 0x0 Intentionally unallocated
OCD 0x1 OCD registers
HSB 0x4 HSB memory space, as seen by the CPU
HSB 0x5
Alternative mapping for HSB space, for compatibility with
other AVR32 devices.
Memory Service
Unit
0x6 Memory Service Unit registers
Reserved Other Unused
32058K
AVR32-01/12