Datasheet
76
AT32UC3A
13.6.7 Interrupt Enable/Disable/Mask/Status/Clear
Name: IER/IDR/IMR/ISR/ICR
Access Type: IER/IDR/ICR: Write-only
IMR/ISR: Read-only
•
BODDET: Brown out detection
Set to 1 when 0 to 1 transition on POSCSR:BODDET bit is detected: BOD has detected that power supply is going below
BOD reference value.
• OSC32RDY: 32 KHz oscillator Ready
Set to 1 when 0 to 1 transition on the POSCSR:OSC32RDY bit is detected: The 32 KHz oscillator is stable and ready to be
used as clock source.
• OSC1RDY: Oscillator 1 Ready
Set to 1 when 0 to 1 transition on the POSCSR:OSC1RDY bit is detected: Oscillator 1 is stable and ready to be used as
clock source.
• OSC0RDY: Oscillator 0 Ready
Set to 1 when 0 to 1 transition on the POSCSR:OSC1RDY bit is detected: Oscillator 1 is stable and ready to be used as
clock source.
• MSKRDY: Mask Ready
Set to 1 when 0 to 1 transition on the POSCSR:MSKRDY bit is detected: Clocks are now masked according to the
(CPU/HSB/PBA/PBB)_MASK registers.
• CKRDY: Clock Ready
0: The CKSEL register has been written, and the new clock setting is not yet effective.
1: The synchronous clocks have frequencies as indicated in the CKSEL register.
Note: Writing ICR:CKRDY to 1 has no effect.
• LOCK1: PLL1 locked
Set to 1 when 0 to 1 transition on the POSCSR:LOCK1 bit is detected: PLL 1 is locked and ready to be selected as clock
source.
• LOCK0: PLL0 locked
Set to 1 when 0 to 1 transition on the POSCSR:LOCK0 bit is detected: PLL 0 is locked and ready to be selected as clock
source.
31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - BODDET
15 14 13 12 11 10 9 8
- - - - - - OSC32RDY OSC1RDY
7 6 5 4 3 2 1 0
OSC0RDY MSKRDY CKRDY - - - LOCK1 LOCK0
32058K
AVR32-01/12