Datasheet

716
AT32UC3A
33.7.8 Interrupt Enable Register
Name:
IER
Access Type: Write-only
Offset: 0x24
Reset Value: –
• RXBUFF: Receive Buffer Full Interrupt Enable
0 = No effect.
1 = Enables the corresponding interrupt. ENDRX: End of Receive Buffer Interrupt Enable
• GOVRE: General Overrun Error Interrupt Enable
• DRDY: Data Ready Interrupt Enable
• OVREx: Overrun Error Interrupt Enable x
• EOCx: End of Conversion Interrupt Enable x
31 30 29 28 27 26 25 24
– – – – – – – –
23 22 21 20 19 18 17 16
– – – – RXBUFF ENDRX GOVRE DRDY
15 14 13 12 11 10 9 8
OVRE7 OVRE6 OVRE5 OVRE4 OVRE3 OVRE2 OVRE1 OVRE0
7 6 5 4 3 2 1 0
EOC7 EOC6 EOC5 EOC4 EOC3 EOC2 EOC1 EOC0
32058K
AVR32-01/12