Datasheet

638
AT32UC3A
30.8.4 USB Pipe/Endpoint X FIFO Data Register (USB_FIFOX_DATA)
Note that this register can be accessed even if USBE = 0 or FRZCLK = 1. Disabling the USB controller (by clearing the
USBE bit) does not reset the DPRAM.
32058K
AVR32-01/12