Datasheet

566
AT32UC3A
Clearing has no effect.
Always read as 0.
• UPRSMEC: Upstream Resume Interrupt Enable Clear
Set to clear UPRSME.
Clearing has no effect.
Always read as 0.
• EPXINTEC, X in [0..6]: Endpoint X Interrupt Enable Clear
Set to clear EPXINTE.
Clearing has no effect.
Always read as 0.
• DMAXINTEC, X in [1..6]: DMA Channel X Interrupt Enable Clear
Set to clear DMAXINTE.
Clearing has no effect.
Always read as 0.
32058K
AVR32-01/12