Datasheet

557
AT32UC3A
30.8.2.2 USB Device Global Interrupt Register (UDINT)
Offset: 0x0004
Register Name: UDINT
Access Type: Read-Only
Reset Value: 0x00000000
• SUSP: Suspend Interrupt Flag
Set by hardware when a USB “Suspend” idle bus state has been detected for 3 frame periods (J state for 3 ms). This trig-
gers a USB interrupt if SUSPE = 1.
Shall be cleared by software (by setting the SUSPC bit) to acknowledge the interrupt.
Cleared by hardware when a Wake-Up interrupt (WAKEUP) is raised.
• SOF: Start of Frame Interrupt Flag
Set by hardware when a USB “Start of Frame” PID (SOF) has been detected (every 1 ms). This triggers a USB interrupt if
SOFE = 1. The FNUM field is updated.
Shall be cleared by software (by setting the SOFC bit) to acknowledge the interrupt.
• EORST: End of Reset Interrupt Flag
Set by hardware when a USB “End of Reset” has been detected. This triggers a USB interrupt if EORSTE = 1.
Shall be cleared by software (by setting the EORSTC bit) to acknowledge the interrupt.
• WAKEUP: Wake-Up Interrupt Flag
Asynchronous interrupt.
Set by hardware when the USB controller is reactivated by a filtered non-idle signal from the lines (not by an upstream
resume). This triggers an interrupt if WAKEUPE = 1.
Shall be cleared by software (by setting the WAKEUPC bit) to acknowledge the interrupt (USB clock inputs must be
enabled before).
Cleared by hardware when a Suspend interrupt (SUSP) is raised.
31 30 29 28 27 26 25 24
DMA6INT DMA5INT DMA4INT DMA3INT DMA2INT DMA1INT –
ru ru ru ru ru ru
0 0 0 0 0 0
23 22 21 20 19 18 17 16
– – – EP6INT EP5INT EP4INT
ru ru ru
0 0 0
15 14 13 12 11 10 9 8
EP3INT EP2INT EP1INT EP0INT – – – –
ru ru ru ru
0 0 0 0
7 6 5 4 3 2 1 0
– UPRSM EORSM WAKEUP EORST SOF – SUSP
ru ru ru ru ru ru
0 0 0 0 0 0
32058K
AVR32-01/12