Datasheet

424
AT32UC3A
28.8 SDRAM Controller User Interface
Table 28-8. SDRAM Controller Memory Map
Offset Register Name Access Reset State
0x00 SDRAMC Mode Register MR Read/Write 0x00000000
0x04 SDRAMC Refresh Timer Register TR Read/Write 0x00000000
0x08 SDRAMC Configuration Register CR Read/Write 0x852372C0
0x0C SDRAMC High Speed Register HSR Read/Write 0x00
0x10 SDRAMC Low Power Register LPR Read/Write 0x0
0x14 SDRAMC Interrupt Enable Register IER Write-only –
0x18 SDRAMC Interrupt Disable Register IDR Write-only –
0x1C SDRAMC Interrupt Mask Register IMR Read-only 0x0
0x20 SDRAMC Interrupt Status Register ISR Read-only 0x0
0x24 SDRAMC Memory Device Register MDR Read/Write 0x0
0x28 - 0xFC Reserved – – –
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AVR32-01/12