Datasheet

220
AT32UC3A
24. Two-Wire Interface (TWI)
2.1.1.0
24.1 Features
• Compatible with Atmel Two-wire Interface Serial Memory and I²C Compatible Devices
(1)
• One, Two or Three Bytes for Slave Address
• Sequential Read-write Operations
• Master, Multi-master and Slave Mode Operation
• Bit Rate: Up to 400 Kbits
• General Call Supported in Slave mode
• Connection to Peripheral DMA Controller (PDC) Channel Capabilities Optimizes Data Transfers in
Master Mode Only
– One Channel for the Receiver, One Channel for the Transmitter
– Next Buffer Support
Note: 1. See Table 24-1 below for details on compatibility with I²C Standard.
24.2 Overview
The Atmel Two-wire Interface (TWI) interconnects components on a unique two-wire bus, made
up of one clock line and one data line with speeds of up to 400 Kbits per second, based on a
byte-oriented transfer format. It can be used with any Atmel Two-wire Interface bus Serial
EEPROM and I²C compatible device such as Real Time Clock (RTC), Dot Matrix/Graphic LCD
Controllers and Temperature Sensor, to name but a few. The TWI is programmable as a master
or a slave with sequential or single-byte access. Multiple master capability is supported. Arbitra-
tion of the bus is performed internally and puts the TWI in slave mode automatically if the bus
arbitration is lost.
A configurable baud rate generator permits the output data rate to be adapted to a wide range of
core clock frequencies.
Below,
Table 24-1 lists the compatibility level of the Atmel Two-wire Interface in Master Mode and
a full I
2
C compatible device.
Note: 1. START + b000000001 + Ack + Sr
Table 24-1. Atmel TWI compatibility with I
2
C Standard
I2C Standard Atmel TWI
Standard Mode Speed (100 KHz) Supported
Fast Mode Speed (400 KHz) Supported
7 or 10 bits Slave Addressing Supported
START BYTE
(1)
Not Supported
Repeated Start (Sr) Condition Supported
ACK and NACK Management Supported
Slope control and input filtering (Fast mode) Not Supported
Clock stretching Supported
32058K
AVR32-01/12