Datasheet

212
AT32UC3A
23.8.5 SPI Status Register
Name: SR
Access Type: Read-only
RDRF: Receive Data Register Full
0 = No data has been received since the last read of RDR
1 = Data has been received and the received data has been transferred from the serializer to RDR since the last read of
RDR.
TDRE: Transmit Data Register Empty
0 = Data has been written to TDR and not yet transferred to the serializer.
1 = The last data written in the Transmit Data Register has been transferred to the serializer.
TDRE equals zero when the SPI is disabled or at reset. The SPI enable command sets this bit to one.
MODF: Mode Fault Error
0 = No Mode Fault has been detected since the last read of SR.
1 = A Mode Fault occurred since the last read of the SR.
OVRES: Overrun Error Status
0 = No overrun has been detected since the last read of SR.
1 = An overrun has occurred since the last read of SR.
An overrun occurs when RDR is loaded at least twice from the serializer since the last read of the RDR.
ENDRX: End of RX buffer
0 = The Receive Counter Register has not reached 0 since the last write in RCR or RNCR.
1 = The Receive Counter Register has reached 0 since the last write in RCR or RNCR.
ENDTX: End of TX buffer
0 = The Transmit Counter Register has not reached 0 since the last write in TCR or TNCR.
1 = The Transmit Counter Register has reached 0 since the last write in TCR or TNCR.
RXBUFF: RX Buffer Full
0 = RCR or RNCR has a value other than 0.
1 = Both RCR and RNCR has a value of 0.
TXBUFE: TX Buffer Empty
0 = TCR or TNCR has a value other than 0.
31 30 29 28 27 26 25 24
23 22 21 20 19 18 17 16
SPIENS
15 14 13 12 11 10 9 8
TXEMPTY NSSR
7 6 5 4 3 2 1 0
TXBUFE RXBUFF ENDTX ENDRX OVRES MODF TDRE RDRF
32058K
AVR32-01/12