User manual

Atmel-ICE [USER GUIDE]
42330A-MCU-07/2014
23
In-System Programming uses the target Atmel AVR’s internal SPI (Serial Peripheral Interface) to
download code into the flash and EEPROM memories. It is not a debugging interface. When designing an
application PCB which includes an AVR with the SPI interface, the pinout shown in Figure 4-8, “SPI Header
Pinout” on page 23 should be used.
Figure 4-8. SPI Header Pinout
PDO/MISO
SCK
/RESET
VCC
PDI/MOSI
GND
1 2
SPI
4.2.6 TPI
TPI is a programming-only interface for some AVR ATtiny devices. It is not a debugging interface, and these
devices to not have OCD capability. When designing an application PCB which includes an AVR with the TPI
interface, the pinout shown in Figure 4-9, “TPI Header Pinout” on page 23 should be used.
Figure 4-9. TPI Header Pinout
TPIDATA
TPICLK
/RESET
VCC
GND
1 2
TPI
(NC)
4.2.7 SWD
The ARM SWD interface is a subset of the JTAG interface, making use of TCK and TMS pins. The ARM JTAG
and AVR JTAG connectors are however not pin-compatible, so when designing an application PCB which uses
a SAM device with SWD or JTAG interface, it is recommended to use the ARM pinout shown in Figure 4-10,
“Recommended ARM SWD/JTAG Header Pinout” on page 23. The SAM connector port on the Atmel-ICE
can connect directly to this pinout.
Figure 4-10. Recommended ARM SWD/JTAG Header Pinout
SWDIO
SWDCLK
SWO
nRESET
VCC
GND
GND
(KEY)
GND
1 2
SAM SWD
(NC)
The Atmel-ICE is capable of streaming UART-format ITM trace to the host computer. Trace is captured on the
TRACE/SWO pin of the 10-pin header (JTAG TDO pin). Data is buffered internally on the Atmel-ICE and is sent
over the HID interface to the host computer. The maximum reliable data rate is about 3MB/s.
4.3 Atmel OCD Implementations
4.3.1 Atmel AVR UC3 OCD (JTAG and aWire)
The Atmel AVR UC3 OCD system is designed in accordance with the Nexus 2.0 standard (IEEE-ISTO
5001™-2003), which is a highly flexible and powerful open on-chip debug standard for 32-bit microcontrollers.
It supports the following features:
Nexus compliant debug solution
OCD supports any CPU speed
Six program counter hardware breakpoints
Two data breakpoints
Breakpoints can be configured as watchpoints
Hardware breakpoints can be combined to give break on ranges