Datasheet

3Atmel ATA6826C [DATASHEET]
9213D–AUTO–09/12
2. Pin Configuration
Figure 2-1. Pinning SO14
Table 2-1. Pin Description
Pin Symbol Function
1 GND Ground; reference potential; internal connection to pin 7, 8 and 14; cooling tab
2 OUT3
Half-bridge output 3; formed by internally connected power MOS high-side switch 3 and low-side
switch 3 with internal reverse diodes; short-circuit protection; overtemperature protection;
diagnosis for short and open load
3 VS Power supply for output stages OUT1, OUT2 and OUT3, internal supply
4 CS
Chip select input; 5V CMOS logic level input with internal pull up;
low = serial communication is enabled, high = disabled
5 DI
Serial data input; 5V CMOS logic level input with internal pull down; receives serial data from the
control device; DI expects a 16-bit control word with LSB being transferred first
6 CLK
Serial clock input; 5V CMOS logic level input with internal pull down;
controls serial data input interface and internal shift register (f
max
=2MHz)
7 GND Ground; see pin 1
8 GND Ground; see pin 1
9 DO
Serial data output; 5V CMOS logic level tristate output for output (status) register data; sends 16-
bit status information to the microcontroller (LSB is transferred first); output will remain tri-stated
unless device is selected by CS = low, therefore, several ICs can operate on only one data
output line.
10 INH Inhibit input; 5V logic input with internal pull down; low = standby, high = normal operation
11 VCC Logic supply voltage (5V)
12 OUT2 Half-bridge output 2; see pin 2
13 OUT1 Half-bridge output 1; see pin 2
14 GND Ground; see pin 1
GND
OUT3
VS
CS
DI
CLK
GND
GND
OUT1
OUT
2
VCC
INH
DO
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8