Atmel ATA5021 Digital Window Watchdog Timer DATASHEET Features ● Low current consumption: IVDD < 25µA ● RC oscillator ● Internal reset during power-up and supply voltage drops (POR) ● “Short” trigger window for active mode ● “Long” trigger window for sleep mode ● Cyclical wake-up of the microcontroller in sleep mode ● Trigger input ● Single wake-up input ● Reset output ● Enable output 9145G–AUTO–09/12
1. Description The digital window watchdog timer, Atmel® ATA5021, is designed in Atmel’s state-of-the-art 0.8µm SOI technology SMART-I.S.™1. In applications where safety is critical, it is especially important to monitor the microcontroller. Normal microcontroller operation is indicated by a cyclically transmitted trigger signal, which is received by a window watchdog timer within a defined time window. A missing or a wrong trigger signal causes the watchdog timer to reset the microcontroller.
2. Pin Configuration Figure 2-1. Pinning SO8 Table 2-1. WUP 1 8 OSC TRIG 2 7 GND MODE 3 6 VDD ENA 4 5 RESET Pin Description Pin Symbol Function 1 WUP Wake-up input (pull-down resistor) There is one digitally debounced wake-up input. During the long watchdog window, each signal slope at the input initiates a reset pulse at pin 5. 2 TRG Trigger input (pull-up resistor) It is connected to the microprocessor’s trigger signal.
3. Functional Description 3.1 Supply Voltage, Pin 6 The Atmel® ATA5021 requires a stabilized supply voltage VDD = 5V ±10% to comply with its electrical characteristics. An external buffer capacitor of C = 10 nF may be connected between pin 6 and GND. 3.2 RC Oscillator, Pin 8 The clock frequency, f, can be adjusted by the components R1 and C1 according to the formula: 1 f = --- with T T = 0.18 × (C1 + Cboard + 0.016) + 0.35 + [1.59 – (C1 + Cboard + 0.016)/85] × R1 × (C1 + Cboard + 0.
Table 3-1. Comparison Table Clock Period Calculation versus Measurement on Test Board (Continued) R1 (kΩ) C1 (nF) Period “T” (µs) by New Formula Period “T” (µs) by Measurement Deviation of New Formula versus Measurement 100.00 0.23 40.07 38.88 –3.0% 100.00 0.47 78.07 78.00 –0.1% 100.00 1.04 167.76 164.00 –2.2% 100.00 4.75 733.17 730.00 –0.4% 100.00 10.49 1542.84 1530.00 –0.8% 119.50 0.23 47.81 46.38 –3.0% 119.50 0.47 93.20 93.00 –0.2% 119.50 1.04 200.37 200.
3.5 Microcontroller in Active Mode 3.5.1 Monitoring with the “Short” Trigger Window After the switch-over mode, the watchdog operates in short watchdog mode and expects a trigger pulse from the microcontroller within the defined time window, t3, (enable time).
3.6 Microcontroller in Sleep Mode 3.6.1 Monitoring with the “Long” Trigger Window The long watchdog mode allows cyclical wake-up of the microcontroller during sleep mode. As in short watchdog mode, there is a disable time, t4, and an enable time, t5, in which a trigger signal is accepted. The watchdog can be switched from the short trigger window to the long trigger window with a “high” potential at the mode pin (pin 3).
4. State Diagram The kernel of the watchdog is a finite state machine. Figure 4-1 shows the state diagram with all possible states and transmissions. Many transmissions are controlled by an internal timer. The numbers for the time-outs are the same as on the pulse diagrams. Figure 4-1.
5. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Pin Symbol Min. Max. Unit VVDD,max –0.4 +6.
7. Electrical Characteristics (Continued) VVDD = 5V, Tamb = –40°C to +125°C, reference point is pin 7, unless otherwise specified. No. Parameters Test Conditions Pin Symbol Min. 2.5 Pull-up current VIN = 0V VVDD = 5V 2, 3 IPU 4, 5 IOUT Typ. Max. Unit Type* –20 –5 µA A –2 +2 mA C 0.2 V A V A Outputs 3.1 Maximum output current 3.2 Logical output “low” IOUT = 1mA 4, 5 VOL 3.3 Logical output “high” IOUT = –1mA 4 VOH 3.
8. Ordering Information Extended Type Number Package Remarks ATA5021-TAPY SO8 Taped and reeled, Pb-free, small reel ATA5021-TAQY SO8 Taped and reeled, Pb-free, big reel Package Information Package: SO 8 Dimensions in mm 5±0.2 4.9±0.1 1.4 0.2 3.7±0.1 0.1+0.15 9. 0.4 1.27 3.8±0.1 6±0.2 3.81 8 5 technical drawings according to DIN specifications 1 4 Drawing-No.: 6.541-5031.01-4 Issue: 1; 15.08.
10. Revision History Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. 9145G-AUTO-09/12 History • Figure 1-1 “Block Diagram with External Circuit” on page 2 updated 9145E-AUTO-11/11 • Section 3.
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