Datasheet

943
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
Figure 42-14. Buffer Structure when classic ADC and touchscreen channels are interleaved
Base Address (BA)
BA + 0x02
ADC_XPOSR0
ADC_CDR88
1
BA + 0x04
8
BA + 0x06
ADC_YPOSR1
ADC_XPOSR0
BA + [(N-1) * 6]
BA + [(N-1) * 6]+ 0x02
Assuming ADC_TSMR(TSMOD) = 1
ADC_TSMR(TSAV) = ADC_TSMR(TSFREQ) = 0
ADC_CHSR = 0x000_0100 , ADC_EMR(TAG) =1
trig.event1
DMA Buffer
Structure
trig.event2
trig.eventN
DMA Transfer
ADC_CDR8
ADC_YPOSR
Assuming ADC_TSMR(TSMOD) = 1
ADC_TSMR(TSAV) = ADC_TSMR(TSFREQ) =
ADC_CHSR = 0x000_0100 , ADC_EMR(TAG)
BA + 0x08
BA + 0x0A
8
ADC_YPOSR1
ADC_XPOSR0
ADC_CDR8
BA + [(N-1) * 6]+ 0x04
ADC_XPOSR0
ADC_CDR80
0
0
ADC_YPOSR0
ADC_XPOSR0
trig.event1
DMA Buffer
Structure
trig.event2
trig.eventN
ADC_CDR8
ADC_YPOSR
0
ADC_YPOSR0
ADC_XPOSR0
ADC_CDR8
Base Address (BA)
BA + 0x02
ADC_XPOSR0
ADC_CDR88
1
BA + 0x04
8
BA + 0x06
BA + [(N-1) * 8]
BA + [(N-1) * 8]+ 0x02
Assuming ADC_TSMR(TSMOD) = 1
ADC_TSMR(TSAV) = 0 ADC_TSMR(TSFREQ) = 1
ADC_CHSR = 0x000_0100 , ADC_EMR(TAG) = 1
trig.event1
DMA Buffer
Structure
trig.event2
trig.eventN
DMA Transfer
ADC_CDR8
ADC_YPOSR
BA + 0x08
BA + 0x0A
8
ADC_YPOSR1
ADC_XPOSR0
ADC_CDR8
BA + [(N-1) * 8]+ 0x04
8
ADC_CDR8
ADC_XPOSR0
1
ADC_YPOSR
trig.event3
trig.event4
BA + 0x0c
trig.eventN+1
8
ADC_CDR8
8
ADC_CDR8
BA + [(N-1) * 8]+ 0x06
BA + 0x0e
Assuming ADC_TSMR(TSMOD) = 1
ADC_TSMR(TSAV) = 1 ADC_TSMR(TSFREQ
ADC_CHSR = 0x000_0100 , ADC_EMR(TAG)
ADC_XPOSR0
ADC_CDR88
1
8
trig.event1
DMA Buffer
Structure
trig.event2
trig.eventN
ADC_CDR8
ADC_YPOSR
trig.event3
trig.event4
trig.eventN+1
ADC_XPOSR0
ADC_CDR88
1
8
ADC_CDR8
ADC_YPOSR
ADC_XPOSR0
ADC_CDR88
1
8
ADC_CDR8
ADC_YPOSR