Datasheet

941
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
When TAG is set (ADC_EMR), the CHNB field (4 most significant bit of the ADC_LCDR) register is set to 0 when XPOS
is transmitted and set to 1 when YPOS is transmitted, allowing an easier post-processing of the buffer or better checking
buffer integrity. In case 4-wire with pressure mode is selected, Z1 value is transmitted to the buffer along with tag set to 2
and Z2 is tagged with value 3.
XSCALE and YSCALE (calibration values) are not transmitted to the buffer because they are supposed to be constant
and moreover only measured at the very first start up of the controller or upon user request.
There is no change in buffer structure whatever the value of PENDET bit configuration in ADC_TSMR register but it is
recommended to use the pen detection function for buffer post-processing (refer to “Pen Detection Status” on page 944).
Figure 42-13. Buffer Structure when only touchscreen channels are enabled
Base Address (BA)
BA + 0x02
ADC_YPOSR1
ADC_XPOSR0
0
BA + 0x04
1
BA + 0x06
ADC_YPOSR1
ADC_XPOSR0
BA + [(N-1) * 4]
BA + [(N-1) * 4]+ 0x02
Assuming ADC_TSMR(TSMOD) = 1 or 3
ADC_TSMR(TSAV) = 0
ADC_CHSR = 0x000_00000 , ADC_EMR(TAG) = 1
trig.event1
DMA Buer
Structure
trig.event2
trig.eventN
DMA Transfer
Assuming ADC_TSMR(TSMOD) =1 or 3
ADC_TSMR(TSAV) = 0
ADC_CHSR = 0x000_00000 , ADC_EMR(TAG) = 0
ADC_YPOSR
ADC_XPOSR
ADC_YPOSR0
ADC_XPOSR0
0
0
ADC_YPOSR0
ADC_XPOSR0
trig.event1
DMA Buer
Structure
trig.event2
trig.eventN
ADC_YPOSR
ADC_XPOSR
Base Address (BA)
BA + 0x02
ADC_YPOSR1
ADC_XPOSR0
2
BA + 0x04
3
BA + 0x06
BA + [(N-1) * 8]
BA + [(N-1) * 8]+ 0x02
Assuming ADC_TSMR(TSMOD) = 2
ADC_TSMR(TSAV) = 0
ADC_CHSR = 0x000_00000 , ADC_EMR(TAG) = 1
trig.event1
DMA Buer
Structure
trig.event2
trig.eventN
DMA Transfer
Assuming ADC_TSMR(TSMOD) = 2
ADC_TSMR(TSAV) = 0
ADC_CHSR = 0x000_00000 , ADC_EMR(TAG) = 0
ADC_PRESSR(Z2)
ADC_PRESSR(Z1)
ADC_YPOSR1
ADC_XPOSR0
2
3
ADC_PRESSR(Z2)
ADC_PRESSR(Z1)
ADC_YPOSR1
ADC_XPOSR0
2
3
ADC_PRESSR(Z2)
ADC_PRESSR(Z1)
BA + 0x08
BA + 0x0A
BA + 0x0C
BA + 0x0E
ADC_YPOSR0
ADC_XPOSR0
0
0
trig.event1
DMA Buer
Structure
trig.event2
trig.eventN
ADC_PRESSR(Z2)
ADC_PRESSR(Z1)
ADC_YPOSR0
ADC_XPOSR0
0
0
ADC_PRESSR(Z2)
ADC_PRESSR(Z1)
ADC_YPOSR0
ADC_XPOSR0
0
0
ADC_PRESSR(Z2)
ADC_PRESSR(Z1)
BA + [(N-1) * 8]+ 0x04
BA + [(N-1) * 8]+ 0x06