Datasheet

815
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
39.8.3 USART Mode Register
Name: US_MR
Address: 0xF801C004 (0), 0xF8020004 (1), 0xF8024004 (2), 0xF8028004 (3)
Access: Read-write
This register can only be written if the WPEN bit is cleared in “USART Write Protect Mode Register” on page 848.
For SPI configuration, see “USART Mode Register (SPI_MODE)” on page 818.
• USART_MODE: USART Mode of Operation
• USCLKS: Clock Selection
31 30 29 28 27 26 25 24
ONEBIT MODSYNC MAN FILTER – MAX_ITERATION
23 22 21 20 19 18 17 16
– VAR_SYNC DSNACK INACK OVER CLKO MODE9 MSBF
15 14 13 12 11 10 9 8
CHMODE NBSTOP PAR SYNC
76543210
CHRL USCLKS USART_MODE
Value Name Description
0x0 NORMAL Normal mode
0x1 RS485 RS485
0x2 HW_HANDSHAKING Hardware Handshaking
0x4 IS07816_T_0 IS07816 Protocol: T = 0
0x6 IS07816_T_1 IS07816 Protocol: T = 1
0x8 IRDA IrDA
0xA LIN_MASTER LIN Master
0xB LIN_SLAVE LIN Slave
0xE SPI_MASTER SPI Master
0xF SPI_SLAVE SPI Slave
Value Name Description
0 MCK Master Clock MCK is selected
1 DIV Internal Clock Divided MCK/DIV (DIV=8) is selected
3 SCK Serial Clock SLK is selected