Datasheet
715
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
38.2 Embedded Characteristics
Three TWIs
Compatible with Atmel Two-wire Interface Serial Memory and I²C Compatible Devices
(1)
One, Two or Three Bytes for Slave Address
Sequential Read-write Operations
Master, Multi-master and Slave Mode Operation
Bit Rate: Up to 400 Kbits
General Call Supported in Slave mode
SMBUS Quick Command Supported in Master Mode
Connection to DMA Controller (DMA) Channel Capabilities optimizes Data Transfers in Master Mode Only
Note: 1. See Table 38-1 for details on compatibility with I²C Standard.
38.3 List of Abbreviations
Table 38-2. Abbreviations
Abbreviation Description
TWI Two-wire Interface
A Acknowledge
NA Non Acknowledge
PStop
SStart
Sr Repeated Start
SADR Slave Address
ADR Any address except SADR
R Read
WWrite