Datasheet

710
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
37.7.10 PWM Channel Duty Cycle Register
Name: PWM_CDTY[0..3]
Address: 0xF8034204 [0], 0xF8034224 [1], 0xF8034244 [2], 0xF8034264 [3]
Access: Read/Write
Only the first 16 bits (internal channel counter size) are significant.
• CDTY: Channel Duty Cycle
Defines the waveform duty cycle. This value must be defined between 0 and CPRD (PWM_CPRx).
31 30 29 28 27 26 25 24
CDTY
23 22 21 20 19 18 17 16
CDTY
15 14 13 12 11 10 9 8
CDTY
76543210
CDTY