Datasheet

546
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
32.7.12 UDPHS Endpoint Control Disable Register (Isochronous Endpoint)
Name: UDPHS_EPTCTLDISx [x=0..6] (ISOENDPT)
Address: 0xF803C108 [0], 0xF803C128 [1], 0xF803C148 [2], 0xF803C168 [3], 0xF803C188 [4], 0xF803C1A8 [5],
0xF803C1C8 [6]
Access: Write-only
This register view is relevant only if EPT_TYPE=0x1 in “UDPHS Endpoint Configuration Register” on page 538
For additional Information, see “UDPHS Endpoint Control Register (Isochronous Endpoint)” on page 551.
• EPT_DISABL: Endpoint Disable
0 = No effect.
1 = Disable endpoint.
• AUTO_VALID: Packet Auto-Valid Disable
0 = No effect.
1 = Disable this bit to not automatically validate the current packet.
• INTDIS_DMA: Interrupts Disable DMA
0 = No effect.
1 = Disable the “Interrupts Disable DMA”.
• DATAX_RX: DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)
0 = No effect.
1 = Disable DATAx Interrupt.
• MDATA_RX: MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)
0 = No effect.
1 = Disable MDATA Interrupt.
• ERR_OVFLW: Overflow Error Interrupt Disable
0 = No effect.
1 = Disable Overflow Error Interrupt.
• RXRDY_TXKL: Received OUT Data Interrupt Disable
0 = No effect.
1 = Disable Received OUT Data Interrupt.
31 30 29 28 27 26 25 24
SHRT_PCKT–––––––
23 22 21 20 19 18 17 16
–––––BUSY_BANK––
15 14 13 12 11 10 9 8
– ERR_FLUSH ERR_CRC_NT
R
ERR_FL_ISO TXRDY_TRER TX_COMPLT RXRDY_TXKL ERR_OVFLW
76543210
MDATA_RX DATAX_RX – – INTDIS_DMA – AUTO_VALID EPT_DISABL