Datasheet

543

SAM9X35 [DATASHEET]

11055E–ATARM–10-Mar-2014

• TX_COMPLT: Transmitted IN Data Complete Interrupt Enable

0 = No effect.

1 = Enable Transmitted IN Data Complete Interrupt.

• TXRDY_TRER: TX Packet Ready/Transaction Error Interrupt Enable

0 = No effect.

1 = Enable TX Packet Ready/Transaction Error Interrupt.

• ERR_FL_ISO: Error Flow Interrupt Enable

0 = No effect.

1 = Enable Error Flow ISO Interrupt.

• ERR_CRC_NTR: ISO CRC Error/Number of Transaction Error Interrupt Enable

0 = No effect.

1 = Enable Error CRC ISO/Error Number of Transaction Interrupt.

• ERR_FLUSH: Bank Flush Error Interrupt Enable

0 = No effect.

1 = Enable Bank Flush Error Interrupt.

• BUSY_BANK: Busy Bank Interrupt Enable

0 = No effect.

1 = Enable Busy Bank Interrupt.

• SHRT_PCKT: Short Packet Send/Short Packet Interrupt Enable

For OUT endpoints:

0 = No effect.

1 = Enable Short Packet Interrupt.

For IN endpoints:

Guarantees short packet at end of DMA Transfer if the UDPHS_DMACONTROLx register END_B_EN and UDPHS_EPTCTLx