Datasheet

463
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
Figure 31-10. DMAC Transfer Flow for Source and Destination Address Auto-reloaded
Multi-buffer Transfer with Source Address Auto-reloaded and Linked List Destination Address (Row 6)
1. Read the Channel Handler Status register to choose a free (disabled) channel.
2. Set up the chain of linked list items (otherwise known as buffer descriptors) in memory. Write the control informa-
tion in the LLI.DMAC_CTRLAx and DMAC_CTRLBx registers location of the buffer descriptor for each LLI in
memory for channel x. For example, in the register, you can program the following:
1. Set up the transfer type (memory or non-memory peripheral for source and destination) and flow control
peripheral by programming the FC of the DMAC_CTRLBx register.
2. Set up the transfer characteristics, such as:
 i. Transfer width for the source in the SRC_WIDTH field.
 ii. Transfer width for the destination in the DST_WIDTH field.
 iii. Source AHB master interface layer in the SIF field where source resides.
 iv. Destination AHB master interface layer in the DIF field where destination resides.
 v. Incrementing/decrementing or fixed address for source in SRC_INCR field.
 vi. Incrementing/decrementing or fixed address for destination DST_INCR field.
3. Write the starting source address in the DMAC_SADDRx register for channel x.
Note: The values in the LLI.DMAC_SADDRx register locations of each of the Linked List Items (LLIs) set up in mem-
ory, although fetched during an LLI fetch, are not used.
Channel enabled by
software
Buffer Transfer
Replay mode for SADDRx,
DADDRx, CTRLAx, CTRLBx
Channel disabled by
hardware
Buffer Transfer Completed
Interrupt generated here
DMAC Chained Buffer Transfer
Completed Interrupt generated here
yes
no
yes
Stall until STALLx is cleared
by writing to KEEPx field
EBCIMR[x]=1?
no
Is DMAC in Row 1 of
DMAC State Machine table?