Datasheet

335
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
27.6.5 PMECC Clock Control Register
Name: PMECC_CLK
Address: 0xFFFFE010
Access: Read-write
Reset: 0x00000000
• CLKCTRL: Clock Control Register
The PMECC Module data path Setup Time is set to CLKCTRL+1.
This field indicates the database setup times in number of clock cycles. At 133 MHz, this field must be programmed with 2, indi-
cating that the setup time is 3 clock cycles.
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
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76543210
––––– CLKCTRL