Datasheet

169
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
21.4.4 Slow Clock Configuration Register
Name: SCKCR
Address: 0xFFFFFE50
Access: Read-write
Reset Value: 0x0000_0001
• RCEN: Internal 32 kHz RC
0: 32 kHz RC is disabled
1: 32 kHz RC is enabled
• OSC32EN: 32768 Hz oscillator
0: 32768 Hz oscillator is disabled
1: 32768 Hz oscillator is enabled
• OSC32BYP: 32768 Hz oscillator bypass
0: 32768 Hz oscillator is not bypassed
1: 32768 Hz oscillator is bypassed, accept an external slow clock on XIN32
• OSCSEL: Slow clock selector
0: Slow clock is internal 32 kHz RC
1: Slow clock is 32768 Hz oscillator
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76543210
––––OSCSELOSC32BYPOSC32ENRCEN