Datasheet

164
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
20.4 Slow Clock Configuration (SCKC) User Interface
20.4.1 Slow Clock Configuration Register
Name: SCKC_CR
Address: 0xFFFFFE50
Access: Read-write
Reset: 0x0000_0001
• RCEN: Internal 32 kHz RC Oscillator
0: 32 kHz RC oscillator is disabled.
1: 32 kHz RC oscillator is enabled.
• OSC32EN: 32768 Hz Oscillator
0: 32768 Hz oscillator is disabled.
1: 32768 Hz oscillator is enabled.
• OSC32BYP: 32768Hz Oscillator Bypass
0: 32768 Hz oscillator is not bypassed.
1: 32768 Hz oscillator is bypassed, accept an external slow clock on XIN32.
• OSCSEL: Slow Clock Selector
0 (RC): Slow clock is internal 32 kHz RC oscillator.
1 (XTAL): Slow clock is 32768 Hz oscillator.
Table 20-1. Register Mapping
Offset Register Name Access Reset
0x0 Slow Clock Configuration Register SCKC_CR Read-write 0x0000_0001
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
––––––––
76543210
– – – – OSCSEL OSC32BYP OSC32EN RCEN