Datasheet

1290
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
SSC:
Section 44.7.1.1 “Clock Divider”, removed Table 43-4 related to Figure 44-5 “Divided Clock Generation”
(duplicated data in Section 44.7.1.4 “Serial Clock Ratio Considerations”).
Section 44.6.3 “Interrupt”, replaced AIC references with “interrupt controller”.
Section 44.9 “Synchronous Serial Controller (SSC) User Interface”:
- updated descriptions of CKS, CKO, and CKG bitfields in:
Section 44.9.3 “SSC Receive Clock Mode Register”
Section 44.9.5 “SSC Transmit Clock Mode Register”
- updated register tables and a description of FSOS bitfield in:
Section 44.9.4 “SSC Receive Frame Mode Register”
Section 44.9.6 “SSC Transmit Frame Mode Register”
Section 44.9.14 “SSC Interrupt Enable Register”, fixed a typo (0=0= --> 0=).
7303
8466
Electrical Characteristics:
Section 47.5 “Main Oscillator Characteristics”, replaced minimum CCRYSTAL value of 17.5 with 15 in Table 47-7
“Main Oscillator Characteristics” and in the corresponding note. Updated the related values in the same note.
Section 47.5.1 “Crystal Oscillator Characteristics”, added maximum and minimum CCRYSTAL values for ESR in
Table 47-8 “Crystal Characteristics”.
Section 47.2 “DC Characteristics”, updated RPULLUP parameter characteristics in Table 47-2 “DC
Characteristics”.
Replaced “Input Leakage Current” with “Input Peak Current” in Table 47-26 “Analog Inputs”.
8098
8147
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Mechanical Overview:
Updated the table title in Table 48-4 “Package Information”.8186
Errata:
Section 50.1 “External Bus Interface (EBI)”, updated the problem description and fix/ workaround.
Removed sections concerning PIO and RTC.
Added Section 50.2 “Reset Controller (RSTC)”, Section 50.3 “Static Memory Controller (SMC)”, and Section 50.4
“USB High Speed Host Port (UHPHS) and Device Port (UDPHS)”.
Added Section 50.6 “LCD Controller (LCDC)”.
Removed “Boot Sequence Controller (BSC)” section (see “Boot Strategies” and “BSC” above for the related
modifications).
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Doc. Rev.
11055B Comments
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System Controller:
Figure 7-1, “SAM9X35 System Controller Block Diagram” , DDR sysclk --> DDRCK.
rfo
ADC:
Section 42. “Analog-to-Digital Converter (ADC)” updated to show Touchscreen information
7987
DMAC:
FIFO size table removed from Section 31.1 “Description”, as the size depends on DMAC0 (see Section 31.2.1
“DMA Controller 0”) and DMAC1 (see Section 31.2.2 “DMA Controller 1”).
8004
MATRIX:
Section 25.7.6.1 “EBI Chip Select Assignment Register”, description of NFD0_ON_D16 bitfield updated.
8008
Doc. Rev.
11055C Comments
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