Datasheet

1283
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
Doc. Rev.
11055C Comments
Change
Request
Ref.
(1)
Introduction:
Section 6.3.3 “DDR2SDR Controller”, replaced LPDDR2 with LPDDR.
Added “Write Protected Registers” in the peripherals list in Section 1. “Features”.
Added “4-bank” references to the DDR2 characteristics in Section 1. “Features”, Section 1. “Features” and
Section 6.3.3 “DDR2SDR Controller”.
Section 5.1 “Power Supplies”, added PLLUTMI cell as a power to the VDDPLLA line in Table 5-1 “SAM9X35
Power Supplies”.
Section 1. “Features”, replaced “MLC/SLC NAND Controller“ with “MLC/SLC 8-bit NAND Controller” in Memories
list.
Section 6.3.2 “Static Memory Controller”, replaced “8- or 16-bit Data Bus” with “8-, 16-, or 32-bit Data Bus”.
Replaced TSADVREF with ADVREF in Figure 2-1 “SAM9X35 Block Diagram”.
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8403
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Boot Startegies:
Section 11.3 “Chip Setup”, added Table 11-1 “External Clock and Crystal Frequencies allowed for Boot
Sequence (in MHz)” and the corresponding text below the table.
Section 11.4.1 “NVM Boot Sequence”, replaced “Boot Sequence Register (BSCR)” with “Boot Sequence
Configuration Register (BSC_CR)” and updated the acronym of this register in the entire section.
Added a reference to the “Boot Sequence Controller (BSC)” section.
Replaced “BSCR value” with “BOOT Value” in the heading line in Table 11-2 “Boot Sequence Configuration
Register Values”.
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rfo
BSC:
Section 12.4.1 “Boot Sequence Configuration Register”:
- updated the BSC_CR register table
- added a reference to the “NVM Boot Sequence” section in “BOOT: Boot Media Sequence” .
Section 12.2 “Embedded Characteristics”, removed “Product-dependent order” line.
Added Section 12.3 “Product Dependencies”.
Updated the acronym of Boot Sequence Configuration Register from “BSCR” to “BSC_CR”.
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AIC:
Section 13.10.2 “AIC Source Mode Register”, removed the PRIOR bitfield table as values 0 to 7 can be used and
updated the description of this bitfield in “PRIOR: Priority Level” .
8017
RSTC:
Section 14.5.1 “Reset Controller Control Register”, updated description of the EXTRST bitfield for the RSTC_CR
register in “EXTRST: External Reset” .
8271
RTC:
Section 15.6 “Real-time Clock (RTC) User Interface”, updated the peripheral name from “Real Time Clock” to
“Real-time Clock” and replaced the Reserved Register line “0x30-0xF8” with two lines “0x30–0xC4” and “0xC8–
0xF8” (Reserved Register) in Table 15-1 “Register Mapping”.
8280
WDT:
Added the 4th paragraph “If the watchdog is restarted...” in Section 17.4 “Functional Description”.
Section 17.5.3 “Watchdog Timer Status Register”, added a note in “WDERR: Watchdog Error”
.
Upda
te
d Section 17.2 “Embedded Characteristics”.
8128:
8218
SHDWC:
Removed AMBA references from Section 18.2 “Embedded Characteristics”.
Section 18.3 “Block Diagram”, removed redundant Figure 18-2. Sutdown Controller Block Diagram.
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