Datasheet

1272
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
47.19 Two-wire Interface Characteristics
Table 47-47 describes the requirements for devices connected to the Two-wire Serial Bus.
For timing symbols, please refer to Figure 47-29.
Notes: 1. Required only for f
TWCK
> 100 kHz.
2. C
b
= capacitance of one bus line in pF. Per I2C Standard, C
b
Max = 400 pF
3. The TWCK low period is defined
as follows: t
low
= ((CLDIV × 2
CKDIV
) + 4) × t
MCK
4. The TWCK high period is defined as follows: t
high
= ((CHDIV × 2
CKDIV
) + 4 × t
MCK
5. t
CP_MCK
= MCK bus period.
Table 47-47. Two-wire Serial Bus Requirements
Symbol Parameter Conditions Min Max Unit
V
IL
Input Low-voltage -0.3 0.3 × V
DDIO
V
V
IH
Input High-voltage 0.7 × V
DDIO
V
CC
+ 0.3 V
V
HYS
Hysteresis of Schmitt Trigger Inputs 0.150 V
V
OL
Output Low-voltage 3 mA sink current 0.4 V
t
R
Rise Time for both TWD and TWCK 20 + 0.1C
b
(1)(2)
300 ns
t
OF
Output Fall Time from V
IHmin
to V
ILmax
10 pF < C
b
< 400 pF
(Figure 47-29)
20 + 0.1C
b
(1)(2)
250 ns
C
i
(1)
Capacitance for each I/O Pin 10 pF
f
TWCK
TWCK Clock Frequency 0 400 kHz
Rp Value of Pull-up Resistor
f
TWCK
100 kHz (V
DDIO
- 0.4V) ÷ 3mA 1000ns ÷ C
b
Ω
f
TWCK
> 100 kHz (V
DDIO
- 0.4V) ÷ 3mA 300ns ÷ C
b
Ω
t
LOW
Low Period of the TWCK Clock
f
TWCK
100 kHz
(3)
µs
f
TWCK
> 100 kHz
(3)
µs
t
HIGH
High Period of the TWCK Clock
f
TWCK
100 kHz
(4)
µs
f
TWCK
> 100 kHz
(4)
µs
t
HD;STA
Hold Time (repeated) START condition
f
TWCK
100 kHz t
HIGH
µs
f
TWCK
> 100 kHz t
HIGH
µs
t
SU;STA
Set-up Time for a Repeated START
condition
f
TWCK
100 kHz t
HIGH
µs
f
TWCK
> 100 kHz t
HIGH
µs
t
HD;DAT
Data Hold Time
f
TWCK
100 kHz 0 3 × t
CP_MCK
(5)
µs
f
TWCK
> 100 kHz 0 3 × t
CP_MCK
(5)
µs
t
SU;DAT
Data Setup Time
f
TWCK
100 kHz t
LOW
- 3 × t
CP_MCK
(5)
—ns
f
TWCK
> 100 kHz t
LOW
- 3 × t
CP_MCK
(5)
—ns
t
SU;STO
Setup Time for STOP condition
f
TWCK
100 kHz t
HIGH
µs
f
TWCK
> 100 kHz t
HIGH
µs
t
HD;STA
Bus free time between a STOP and START
condition
f
TWCK
100 kHz t
HIGH
µs
f
TWCK
> 100 kHz t
HIGH
µs