Datasheet

1269
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
47.18.5 USART in SPI Mode Timings
47.18.5.1 T iming conditions
Timings are given assuming a capacitance load as defined in
Table 47-40.
47.18.5.2 Timing extraction
Figure 47-26.USART SPI Master Mode
Figure 47-27.USART SPI Slave mode: (Mode 1 or 2)
Table 47-45. Capacitance Load
Supply
Corner
Max Min
3.3V 40 pF 5 pF
1.8V 20 pF 5 pF
NSS
SPI
0
MSB
LSB
SPI
1
CPOL=1
CPOL=0
MISO
MOSI
SCK
SPI
5
SPI
2
SPI
3
SPI
4
SPI
4
SCK
MISO
MOSI
SPI
6
SPI
7
SPI
8
NSS
SPI
12
SPI
13