Datasheet

1262
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
Figure 47-14.Minimum and Maximum Access Time for SPI Output Signal
Table 47-39. SPI Timings with 1.8V Peripheral Supply
Symbol Parameter Conditions Min Max Unit
SPI
SPCK
SPI Clock
Master Mode
66 MHz
SPI
0
MISO Setup time before SPCK rises 15.9 ns
SPI
1
MISO Hold time after SPCK rises 0 ns
SPI
2
SPCK rising to MOSI 0 6.7 ns
SPI
3
MISO Setup time before SPCK falls 14.8 ns
SPI
4
MISO Hold time after SPCK falls 0 ns
SPI
5
SPCK falling to MOSI 0 6.8 ns
SPI
6
SPCK falling to MISO
Slave Mode
3.8 16.0 ns
SPI
7
MOSI Setup time before SPCK rises 2.2 ns
SPI
8
MOSI Hold time after SPCK rises 0 ns
SPI
9
SPCK rising to MISO 3.5 15.8 ns
SPI
10
MOSI Setup time before SPCK falls 1.8 ns
SPI
11
MOSI Hold time after SPCK falls 0.2 ns
SPI
12
NPCS0 setup to SPCK rising 4.0 ns
SPI
13
NPCS0 hold after SPCK falling 0 ns
SPI
14
NPCS0 setup to SPCK falling 3.6 ns
SPI
15
NPCS0 hold after SPCK rising 0 ns
SPI
16
NPCS0 falling to MISO valid 17.9 ns
SPCK
MISO
MOSI
SPI
2max
SPI
0
SPI
1
SPI
2min