Datasheet

1226
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
46.7.99 Hardware Cursor Layer Configuration 0 Register
Name: LCDC_HCRCFG0
Address: 0xF803836C
Access: Read-write
Reset: 0x00000000
BLEN: AHB Burst Length
DLBO: Defined Length Burst Only for Channel Bus Transaction.
0: Undefined length INCR burst is used for a burst of 2 and 3 beats.
1: Only Defined Length burst is used (SINGLE, INCR4, INCR8 and INCR16).
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
–––––––DLBO
76543210
–– BLEN ––––
Value Name Description
0AHB_SINGLE
AHB Access is started as soon as there is enough space in the FIFO to store one data. SINGLE, INCR,
INCR4, INCR8 and INCR16 bursts can be used. INCR is used for a burst of 2 and 3 beats.
1 AHB_INCR4
AHB Access is started as soon as there is enough space in the FIFO to store a total amount of four 32-bit
data. An AHB INCR4 Burst is preferred. SINGLE, INCR and INCR4 bursts can be used. INCR is used for
a burst of 2 and 3 beats.
2 AHB_INCR8
AHB Access is started as soon as there is enough space in the FIFO to store a total amount of eight 32-bit
data. An AHB INCR8 Burst is preferred. SINGLE, INCR, INCR4 and INCR8 bursts can be used. INCR is
used for a burst of 2 and 3 beats.
3 AHB_INCR16
AHB Access is started as soon as there is enough space in the FIFO to store a total amount of sixteen
32-bit data. An AHB INCR16 Burst is preferred. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts can be
used. INCR is used for a burst of 2 and 3 beats.