Datasheet

1217
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
46.7.90 Hardware Cursor Layer Channel Status Register
Name: LCDC_HCRCHSR
Address: 0xF8038348
Access: Read-only
Reset: 0x00000000
• CHSR: Channel Status Register
When set to one, this field disables the layer at the end of the current frame.
• UPDATESR: Update Overlay Attributes In Progress
When set to one, this bit indicates that the overlay attributes will be updated on the next frame.
• A2QSR: Add To Queue Pending Register
When set to one, this bit indicates that the head pointer is still pending.
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76543210
–––––A2QSRUPDATESRCHSR