Datasheet

1136
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
46.7.17 Base Layer Channel Status Register
Name: LCDC_BASECHSR
Address: 0xF8038048
Access: Read-only
Reset: 0x00000000
CHSR: Channel Status Register
When set to one, this field disables the layer at the end of the current frame.
UPDATESR: Update Overlay Attributes In Progress
When set to one, this bit indicates that the overlay attributes will be updated on the next frame.
A2QSR: Add To Queue Pending Register
When set to one, this bit indicates that the head pointer is still pending.
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
––––––––
76543210
–––––A2QSRUPDATESRCHSR